FPGA Design/Verification Engineer - Level 4 - Sunnyvale, CA


Company:
HQ Aero
Location:
Sunnyvale, CA
Post Date:
December 18, 2017
Job Status:

Description:

 

FPGA Design/Verification Engineer – Level 4 – Sunnyvale, CA

Description:

HQ Aero is currently recruiting for experienced FPGA Design/Verification Engineer – Level 4 for openings in Sunnyvale, CA.

Requirements:

  • Bachelor’s degree from an accredited college in a related discipline, or equivalent experience/combined education with 9 years of professional experience (or 7 years of professional experience required with a related Master’s degree or 4 years of professional experience required with a related PhD or JD; or no experience required with a MD).
  • FPGA & ASIC Design and Verification experience; Language Proficient in VHDL/Verilog for FPGA Development; FPGA Verification with OVM/UVM; Developing, testing and integrating digital signal processing, high speed digital design, high speed communication or system-on-chip implemented on FPGA platforms; Strong lab integration and test skills.
  • Criminal Background Check required.
  • Compliant to FAA Drug and Alcohol screening and background checks mandatory.
Contact
HQ Aero
Phone: 1-866-645-8606

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